1. Field of the Invention
This invention relates to a method of grounding integrated circuit chips and, more particularly, to a method of using a nonconductive die attach material to affix integrated circuit chips to a substrate and using a conductive layer adhered to the die attach material and dice sides to ground the chips.
2. Description of the Prior Art
Among the results of using conventional isolation methods in fabricating complementary metal oxide semiconductor (CMOS) devices is creation of parasitic MOS and parasitic bipolar devices that can be rendered conductive, or turned on, by ionizing radiation. Compensation for such parasitic devices must thus be provided in order to avoid spurious operation and consequential circuit failure. Latch-up may occur in some devices as a result of a parasitic silicon controlled rectifier (SCR) being turned on by gamma radiation. Single event upset (SEU) is caused by ionization occurring along the path of a single energetic particle passing through an integrated circuit. If the energetic particle generates the critical charge within the critical volume of a digital device, then logic upset occurs. The critical charge is the minimum amount of charge necessary to change the state of a logic or memory cell. The critical charge can be deposited by direct ionization from cosmic rays, alpha particles or secondary particles from nuclear reactions. Using a conductive die attach material to affix the base of a die to a grounded or biased surface is an effective method of biasing the bulk silicon in CMOS and other latch-up susceptible devices which are used in high intensity radiation environments.
While conductive die attach materials such as solder preforms and silver-containing epoxy resins can be used with little trouble on some dice, very large scale integrated circuits (VLSI), and especially VLSI dice that are tolerant to radiation, i.e., radiation hardened, are so complex and densely integrated that use of a conductive die attach material may pose unacceptable risks. Erroneous placement of conductive material on a VLSI die surface is likely to result in destruction of the die. In single die packages, correct placement of conductive material is not difficult to achieve; however, in multiple die packages, such as high density interconnect (HDI) packages deposition of conductive material at incorrect locations on the VLSI die surfaces is much more likely. HDI packages typically comprise a plurality of dice on a substrate which are interconnected by a metal interconnect pattern positioned on a polymer overlay layer laminated over the tops of the dice. The metal interconnect pattern can be formed by adaptive laser lithography as described in the above-referenced co-pending application Ser. No. 947,461, allowing placement of integrated circuit chips (i.e., dice) closely adjacent one another.
Capillary action of the die attach material, while in its liquid state, tends to draw the chips together during the die attachment procedure and this tendency becomes more pronounced at elevated curing temperatures where viscosity of the die attach material is lower than at room temperatures As the chips thus approach each other, or "swim together", under this capillary action, the conductive die attach material flows up over the tops of the dice by capillary attraction, resulting in short circuits between the conductors present on the sides of most VLSI chips and the pads present on the top surfaces of the respective chips. The shorting results in chip failure and, in general, VLSI chips having this problem are unrepairable.
High atomic number materials such as silver or gold cannot easily be used in mixtures with thermoplastic materials for die attach because the silver or gold flakes mixed with the thermoplastic materials spall in high intensity ionizing radiation environments and cause detachment of the dice. In addition, large dice cannot be attached directly by soldering or brazing since the thermal expansion coefficient mismatch between the solder or brazing alloy and both the silicon chip and the ceramic substrate introduces stresses that are so great that breakage may result. Yet silicon substrates are generally too fragile to carry large numbers of dice.